Computing With Light: A Field Guide to Photonic AI Chips — Field Guide

Why data movement — not compute — is now the binding constraint

Data centers that train large models now draw as much power as a small city — and more than half of that power is not computing. It is moving numbers between chips, between racks, and between memory and processors.

Traditional chips move electrons around metal wires. Photonic chips use pulses of light traveling through tiny optical circuits etched on silicon. That gives photonic designs the potential to run some AI tasks far faster and with far less heat: a decisive win when power and latency are the binding constraints.

Optical links cheat physics in a useful way. They consume just 0.05–0.2 picojoules per bit, compared to the much higher energy requirements of electrical interconnects over similar distances. And one waveguide can carry many channels simultaneously, each on its own wavelength of light.

The two kinds of optical chip everyone confuses

1. Photonic interconnect — this does not change the math. It changes the highway. Light replaces copper for GPU-to-GPU, chiplet-to-chiplet, rack-to-rack traffic. This is the category with working commercial products in 2025–2026.

2. Photonic compute — this changes the math. A photonic AI accelerator performs matrix multiplications using light rather than electrical signals, with multiplication and accumulation happening as light propagates and interferes through a structured medium. This category is real, but still in pilot deployment.

How you do y = Wx with light

A photonic tensor core works in three stages:

Encode

Lasers generate coherent light flowing into a waveguide network etched onto silicon. The intensity and phase of each optical signal encodes a numerical value from the input vector or weight matrix.

Compute

Light passes through a mesh of Mach-Zehnder interferometers (MZIs). Each MZI is a tunable beamsplitter: apply heat to a tiny arm, shift its phase, and you control how two beams interfere when they recombine. That phase setting encodes the weight w_ij. As beams propagate and recombine across the mesh, the physics of interference performs the multiply-accumulate:

y_i = Σ w_ij · x_j

Add wavelength division multiplexing and you can push 32 different input vectors through the same mesh simultaneously on 32 different wavelengths — the optical analog of batched matrix operations. No transistor switches for the multiply itself.

Read

Photodetectors at the output convert the optical result back to electronic signals for memory storage or further processing.

Why we don’t have photonic laptops yet

Memory is still electronic. There is no good optical RAM. Every inference pass requires loading weights from electronic memory through digital-to-analog and analog-to-digital converters — a conversion tax that partially offsets the optical efficiency gain.

Precision is analog. Fabrication error and thermal drift make 4–8 bit inference practical today; 16-bit training remains difficult. Post-training quantization to 4–8 bit is increasingly standard for LLMs anyway, which reduces but does not eliminate this gap.

Nonlinearities are awkward. Activation functions like ReLU and softmax are trivial to implement in transistors and clumsy in optics — the nonlinear operations in neural networks almost always revert to electronic processing.

Packaging complexity. Integrating lasers, fiber coupling, and thermal management into a server chassis at scale is expensive and sensitive to vibration and temperature.

The practical conclusion: light is brilliant at linear transforms and moving data, poor at storing data and making decisions. Hybrid architectures — electronic where you need memory and control logic, photonic where you need bandwidth and linear algebra — are where the industry is converging.

Who is shipping what in 2026

Lightmatter

Demonstrated the first photonic processor capable of running ResNet, BERT, and reinforcement learning inference without model modification. Measured performance: 65.5 TOPS at 78 W compute plus 1.6 W optical. In March 2026, Lightmatter sampled Passage, a co-packaged optics chiplet achieving 1.6 Tbps throughput per fiber — a record at the time of announcement.

Celestial AI + Marvell

Celestial AI’s Photonic Fabric architecture targets 16 Tbps scale-out bandwidth between accelerators. Marvell Semiconductor acquired Celestial AI for $3.25 billion in February 2026, signaling how seriously conventional chip companies are taking optical interconnects.

Intel, Ayar Labs, NVIDIA, AMD

All major GPU vendors have active programs for co-packaged optics — moving the optical transceiver from the edge of a network switch card to directly on top of the compute die. This eliminates the 10–20 cm of copper trace between the GPU and the optics module, which is where much of the current interconnect energy is lost.

The progression across these vendors follows a clear pattern: optics first connects the GPUs, then it starts replacing computational subsystems of the GPU.

What comes next

We will not get an all-optical AI chip in the near term. The roadmap leads toward AI systems that are electronic where they need memory and deterministic control, photonic where they need raw bandwidth and linear algebra throughput.

For researchers using large models, that means lower cost per inference token as data center efficiency improves. For researchers working on hardware or physics of computation, photonics is now a genuine frontier — the theoretical efficiency limits of optical matrix multiplication are orders of magnitude beyond what silicon CMOS can achieve.

The era of counting transistors is ending. The era of counting photons is starting.